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NCP1605, NCP1605A, NCP1605B
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28
More specifically, when the circuit is in OFF state:
" The drive output is kept low
" All the blocks are off except:
1. The UVLO circuitry that keeps monitoring the
V
CC
 voltage and controlling the startup current
source accordingly.
2. The TSD (thermal shutdown)
3. The STDWN latch that stores its output state.
4. The Undervoltage Protection (UVP).
5. The brownout circuitry. One must note that the
comparator is reset during the latchedoff phase
so that its threshold is the upper one (1 V) when
the circuit enters the active phase (refer to next
V
CC
 sequences section).
6. The high voltage, startup current source when the
circuit is in startup phase (that is when V
CC
 is
lower than V
CC
STUP).
" The Pin 3 capacitor is discharged and kept grounded
along the OFF time, to initialize it for the next
operating sequence, where it must be slowly and
gradually charged to offer some softstart.
" The pfcOK pin is grounded.
" The output of the V
TON
 processing block is
grounded
V
CC
 Sequences
The following table summarizes the state of the circuit
in accordance to the V
CC
 level.
V
CC
 Conditions
OFF is Low
(no condition forces the circuit off)
OFF is High
(due to some protection like the thermal shutdown)
V
CC
 exceeds V
CC
ON
?the circuit enters the
working phase
The startup current source is disabled
The circuit is fully active
The startup current source is disabled
The circuit is in OFF state
V
CC
 drops below V
CC
OFF
?the circuit enters the
latchedoff phase
The circuit is in OFF state
The brownout block resets during the
latchedoff phase so that its comparator
threshold is forced to be the upper one (1 V)
The circuit is in OFF state
The brownout block resets during the latchedoff
phase so that its comparator threshold is forced to be
the upper one (1 V)
V
CC
 goes below V
CC
STUP
?the circuit enters the
startup phase
The high voltage, startup current source turns
on to charge V
CC
.
The drive output and the pfcOK are in low
state (the circuit is off)
All the circuit blocks are reset except:
The thermal shutdown (TSD) and the
brownout block that keep operating
The STDWN latch.
The high voltage, startup current source turns on to
charge V
CC
.
The drive output and the pfcOK are in low state (the
circuit is off)
All the circuit blocks are reset except:
The thermal shutdown (TSD) and the brownout
block that keep operating
The STDWN latch.
V
CC
 goes below V
CC
RESET
?the circuit resets
The high voltage, startup current source is on.
The whole circuitry is reset including the
TSD and the STDWN latch. After reset,
the TSD threshold is 150癈 and the output of
the STDWN latch is low.
The high voltage, startup current source is on.
The whole circuitry is reset including the TSD and the
STDWN latch. After reset, the TSD threshold is 150癈
and the output of the STDWN latch is low.
The figures on the following pages portray the circuit behavior during a startup phase:
" In case of normal conditions (Figure 70).
" As a function of the brownout pin voltage (Figure 71).
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